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・ Steampunk
・ Steampunk (anthology)
・ Steampunk (comics)
・ Steampunk (disambiguation)
・ Steampunk City
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・ Steampunk HQ
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・ Steampunk World's Fair
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・ Steamroller
Steamroller (microarchitecture)
・ Steamroller Blues
・ Steamroller Productions
・ Steamship
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・ Steamship Historical Society of America
・ Steamship Pulaski disaster
・ Steamship Valley Camp
・ Steamship William G. Mather Maritime Museum
・ Steamshovel Press
・ Steamtown
・ Steamtown Heritage Rail Centre
・ Steamtown Marathon
・ Steamtown National Historic Site
・ Steamtown Peterborough Railway Preservation Society


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Steamroller (microarchitecture) : ウィキペディア英語版
Steamroller (microarchitecture)

AMD Steamroller Family 15h is a microarchitecture developed by AMD, which succeeded Piledriver in the beginning of 2014 as the third-generation Bulldozer-based microarchitecture. Steamroller APUs continue to use two-core modules as their predecessors, while aiming at achieving greater levels of parallelism.
== Microarchitecture ==
''Steamroller'' still features two-core modules found in ''Bulldozer'' and ''Piledriver'' designs called clustered multi-thread (CMT), meaning that one module is equal to a dual-core processor. The focus of ''Steamroller'' is for greater parallelism. Improvements center on independent instruction decoders for each core within a module, 25% more of the maximum width dispatches per thread, better instruction schedulers, improved perceptron branch predictor, larger and smarter caches, up to 30% fewer instruction cache misses, branch misprediction rate reduced by 20%, dynamically resizable L2 cache, micro-operations queue, more internal register resources and improved memory controller.
AMD estimated that these improvements will increase instructions per cycle (IPC) up to 30% compared to the first-generation Bulldozer core while maintaining Piledriver's high clock rates with decreased power consumption.〔 The final result was a 9% single-threaded IPC improvement, and 18% multi-threaded IPC improvement over Piledriver.
Steamroller, the microarchitecture for CPUs, as well as Graphics Core Next, the microarchitecture for GPUs, are paired together in certain product lines, and both support certain features specified in Heterogeneous System Architecture in hardware.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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